Switching Converter | PartQuest™ Explore

Copy of Step-Down (Buck) DC to DC Converter - Switching - on Tue, 07/07/2020 - 11:59

mike.zeng
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mike.zeng

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Step-Down (Buck) DC to DC Converter - Continuous”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensator, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients are very similar to the results from the continuous model.

This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVTS560EMFS) and op-amps (MC33272A), as well as the soft-saturation inductor (XAL6060-223) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.

While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models.

The companion design, "TDFS Loop Stability for Step-Down (Buck) DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Copy of NCV891930MW01 Virtual Demo Board - on Fri, 05/29/2020 - 13:06

Devon Johnson
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Devon Johnson

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Description

This version of the NCV891930MW01 "Virtual Evaluation Board" represents most of the features of the 3.65 V/4.0V output part. By changing various input stimulus and loading conditions, you can test these capabilities in the context of their intended usage.

For the nominal configuration, the input voltage is set to 12V, the synci source is delayed for 10 msec (well beyond the simulation end-time), and the load resistance is fixed at 1 Ohm until 500 us, then it jumps to 10 kOhm for 100 us, then back to 1 Ohm. The soft-start operates normally, but during the high resistance operation of the load transient, a single pulse-skip interval is observed. You can zoom in on the PWM signal and see that only two 500 kHz pulses were applied during the “burst” interval, but it will generate 3 pulses under other operating conditions. You can also see that the PWM frequency is spread-spectrum after the soft-start is complete, by measuring the clock frequency (as a waveform) in the main waveform viewer.

To test the “GH continuous ON” behavior, you can select the “DC” option in the load resistance function generator to set the value to a fixed 1 Ohm, and set the input voltage to 5.5V. In the simulation you'll observe several long periods of "continuous GH" operation, with 200 ns boost recharge windows every 16 us, after soft-start has finished.

To test SYNCI operation, set the input voltage to 12V and the load resistance to “Pulse” (i.e. back to their original values), and then change the synci source delay to 10 ns (instead of 10 ms). Then the device will operate in forced PWM mode, with negative inductor currents allowed during the high load resistance period (i.e. not diode-emulation), and no pulse-skip.

Other features can also be tested (high voltage frequency fold-back, output voltage select, LDO bypass jumper removed, etc.). In addition, you can force abnormal operating states using the two fixed logic sources available in the lower left corner of the schematic. For example, if the controller signal “d_spread_spectrum” is disconnected right at the input to the oscillator, and then a new net is connected from “d_set0” to that open input port, then the oscillator's spread-spectrum function will be disabled regardless of the normal controller commanded behavior.

Notes:

(1) Because a simplified version of the resistor divider network and compensation is used, the model will regulate above the target output voltage at light loads. The the real IC will regulate within specifications.

(2) In order to reduce the simulation time, the softstart capacitor value has been adjusted to reduce the softstart time. The value used in this project does not reflect the suggested value from the evaluation board schematic. The desired capacitor value should be selected based on the equation provided in the datasheet.

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Copy of Step-Down (Buck) DC to DC Converter - Switching - on Fri, 05/22/2020 - 11:42

ivanildosistema
Designer232022

ivanildosistema

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4 years 6 months

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Step-Down (Buck) DC to DC Converter - Continuous”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensator, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients are very similar to the results from the continuous model.

This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVTS560EMFS) and op-amps (MC33272A), as well as the soft-saturation inductor (XAL6060-223) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.

While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models.

The companion design, "TDFS Loop Stability for Step-Down (Buck) DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Copy of Step-Down (Buck) DC to DC Converter - Switching

Weidong
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Weidong

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5 years 4 months

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Step-Down (Buck) DC to DC Converter - Continuous”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensator, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients are very similar to the results from the continuous model.

This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVTS560EMFS) and op-amps (MC33272A), as well as the soft-saturation inductor (XAL6060-223) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.

While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models.

The companion design, "TDFS Loop Stability for Step-Down (Buck) DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Copy of Transient Stability Testing of Transmission Line Fed LED Driver - on Tue, 03/24/2020 - 11:15

darkson00
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darkson00

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Copy of Step-Down (Buck) DC to DC Converter - Switching - on Tue, 03/17/2020 - 13:44

Takayuki
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Takayuki

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5 years 1 month

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Step-Down (Buck) DC to DC Converter - Continuous”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensator, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients are very similar to the results from the continuous model.

This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVTS560EMFS) and op-amps (MC33272A), as well as the soft-saturation inductor (XAL6060-223) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.

While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models.

The companion design, "TDFS Loop Stability for Step-Down (Buck) DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Copy of Step-Down (Buck) DC to DC Converter - Switching - on Tue, 03/17/2020 - 10:27

JSAE
Designer76296

JSAE

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Step-Down (Buck) DC to DC Converter - Continuous”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensator, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients are very similar to the results from the continuous model.

This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVTS560EMFS) and op-amps (MC33272A), as well as the soft-saturation inductor (XAL6060-223) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.

While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models.

The companion design, "TDFS Loop Stability for Step-Down (Buck) DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Copy of Step-Down (Buck) DC to DC Converter - Switching - on Sat, 03/14/2020 - 19:15

julioleme.mail
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julioleme.mail

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4 years 8 months

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Step-Down (Buck) DC to DC Converter - Continuous”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensator, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients are very similar to the results from the continuous model.

This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVTS560EMFS) and op-amps (MC33272A), as well as the soft-saturation inductor (XAL6060-223) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.

While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models.

The companion design, "TDFS Loop Stability for Step-Down (Buck) DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Copy of Transient Stability Testing of Transmission Line Fed LED Driver - on Thu, 03/12/2020 - 07:50

aruninis
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aruninis

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Copy of Transient Stability Testing of Transmission Line Fed LED Driver - on Wed, 03/04/2020 - 09:55

danirech
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danirech

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Description

Este es un ejemplo complementario del diseño: "Estabilidad de impedancia TDFS del controlador LED alimentado por línea de transmisión - Conmutación". En esta versión, se agrega un interruptor para encender dos de los LED después de 2 ms, para inyectar una carga transitoria en el sistema. Este transitorio expondrá la gravedad de la respuesta de llamada amortiguada en la entrada del convertidor o la inestabilidad del sistema si la relación fuente / impedancia de carga es inadecuada.

La configuración inicial para este diseño utiliza una longitud de cable de 400 metros con 8 AWG = 2.1 mOhm / metro conductores y un condensador de entrada del convertidor = 22uF. Esto es consistente con el diseño complementario. Puede intentar usar un cable de mayor longitud (por ejemplo, 800 metros, 5 AWG = 1 mOhm / metro) haciendo una copia de este diseño y volviendo a ejecutar la simulación. Verá que el circuito se vuelve inestable en esa longitud más larga. También puede probar valores más grandes de capacitancia de entrada para mitigar el problema de inestabilidad.

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mike.zeng
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Devon Johnson
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ivanildosistema
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Weidong
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darkson00
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Takayuki
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JSAE
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julioleme.mail
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aruninis
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danirech
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