Digital Board Thermal Control (Smartphone) Example - Thermal Netlist

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Member of the PartQuest Explore Development Team. Focused on modeling and simulation of analog, mixed-signal and multi-discipline systems covering a broad range of applications, including power electronics, controls and mechatronic systems.

Description

This schematic shows the&nbsp;electro-thermal dynamics of a "smart-phone". The components modeled are primarily digital ICs, and only their electrical power consumption and heat transfer to the board/enclosure is modeled. The power input at each operating state (idle, streaming, gaming) is specified by the user, along with the corresponding calibration voltage and clock rate. The actual power consumed and heat dissipated by the&nbsp;device will vary as those operating parameters are changed during simulation (e.g. higher power dissipation of digital devices at higher clock rates). The "analog" components, which include the battery and the State-Average Buck Power Converter, also contribute heat corresponding to the&nbsp;actual (time varying) load current.

The "thermals" of the board/enclosure are represented by an IEEE Standard VHDL-AMS&nbsp;"Thermal Netlist" model, shown on the far right&nbsp;of the schematic. This model was generated by FloTHERM for a specific board layout, based on a detailed&nbsp;3D-CFD analysis. The&nbsp;generated model was&nbsp;directly and easily imported into this&nbsp;electro-thermal schematic, so that it could be&nbsp;simulated in this functional&nbsp;system context.

This design can be&nbsp;used during the&nbsp;development process of a&nbsp;"maximum clock-rate tracking algorithm", shown on the far left of the schematic. The sampled-data algorithm is attempting to keep the temperature of the phone, as measured by a thermistor&nbsp;at the "TemperatureAboveProcessor" temperature sense&nbsp;point, between two limit values. It does this by adjusting the global clock rate that is distributed to all the digital components. The user can change&nbsp;the parameters of the&nbsp;algorithm, for example to set different temperature limits,&nbsp;sample rates, and&nbsp;the minimum and maximum clock-rates. The user can also test&nbsp;various operating conditions, such as the battery open-circuit voltage and internal resistance (i.e. to simulate different states-of-charge), as well as the calibrated power dissipation levels of the CPU&nbsp; and GPU.

For fun, try changing the temperature sample_period on the control algorithm from 10 to 20 seconds. Note that the clock rate no longer drops to 2GHz&nbsp;while&nbsp;"gaming".&nbsp;This is because the extra sampling delay gives the temperature transient more time to fall below the upper limit, after&nbsp;the clock-rate is decreased from 8GHz to 4GHz. Now try sample_period = 5&nbsp;seconds, and notice that the performance is even worst (i.e. spends almost half the time at 2&nbsp;GHz while gaming).

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