Op-Amp Lead-Lag Compensator | PartQuest™ Explore

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVBA130LT3G) and op-amps (NCV20071), as well as the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models. For example, the stress indicator for the power inductor shows that the maximum RMS current level is exceeded under this simulated operating condition (i.e. stress_ratio_current_rms &gt; 1.0).The companion design, "TDFS Loop Stability for Buck DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Buck DC to DC Converter - Switching

DGB
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DGB

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVBA130LT3G) and op-amps (NCV20071), as well as the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models. For example, the stress indicator for the power inductor shows that the maximum RMS current level is exceeded under this simulated operating condition (i.e. stress_ratio_current_rms &gt; 1.0).The companion design, "TDFS Loop Stability for Buck DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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TDFS Loop Stability for Step-Down DC to DC (Buck) Converter - Switching

Mike Donnelly
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Mike Donnelly

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11 years

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Member of the PartQuest Explore Development Team. Focused on modeling and simulation of analog, mixed-signal and multi-discipline systems covering a broad range of applications, including power electronics, controls and mechatronic systems.

Description

This example demonstrates the TDFS (Time Domain Frequency Sweep) Loop Stability Instrument Model. It is used to compute the open-loop transfer function of an operating (closed-loop) switching power converter. There is no need for state-average or continuous equivalent models for the modulator section of the design, as normally needed for frequency-domain (or "AC") analysis. Rather, the actual circuit component models can be used directly, because the open-loop transfer function is computed from time-domain simulation results.In this case, the converter is operating at 200kHz switching frequency, and is converting the 12V DC input to a regulated 5V output, while supplying a 5A current to the 1 Ohm load resistor. The TDFS measurement instrument indicates that the open-loop gain crossover frequency is at 26 kHz, and the phase margin is just under 60 degrees. This verifies that the opamp-based lead-lag compensator is providing adequate stability margin under these operating conditions.Note that the TDFS instrument model characterizes the open loop transfer function by injecting a small sinusoidal stimulus signal in series with the loop, and then measures the complex ratio of the return signal to the injected signal, is described in:D. Venable, “Testing Power Sources for Stability”, Venable technical paper #1, Venable Industries.The companion example, "Step-Down (Buck) DC to DC Converter - Switching", shows the line and load transient response of this converter design. Another companion example, "Step-Down (Buck) DC to DC Converter - Continuous", uses a state-average model of the switching (or modulator) section of the converter, so it supports traditional "AC" or frequency-domain analysis.

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My DC to DC Converter - Switching

Kares
Designer98036

Kares

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7 years 10 months

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVBA130LT3G) and op-amps (NCV20071), as well as the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models. For example, the stress indicator for the power inductor shows that the maximum RMS current level is exceeded under this simulated operating condition (i.e. stress_ratio_current_rms &gt; 1.0).The companion design, "TDFS Loop Stability for Buck DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Buck DC to DC Converter - Switching

HargunjitSinghLubana
Designer94806

HargunjitSinghLubana

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7 years 11 months

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVBA130LT3G) and op-amps (NCV20071), as well as the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models. For example, the stress indicator for the power inductor shows that the maximum RMS current level is exceeded under this simulated operating condition (i.e. stress_ratio_current_rms &gt; 1.0).The companion design, "TDFS Loop Stability for Buck DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Buck DC to DC Converter - Switching

Giovanni
Designer13206

Giovanni

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8 years 11 months

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVBA130LT3G) and op-amps (NCV20071), as well as the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models. For example, the stress indicator for the power inductor shows that the maximum RMS current level is exceeded under this simulated operating condition (i.e. stress_ratio_current_rms &gt; 1.0).The companion design, "TDFS Loop Stability for Buck DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Buck DC to DC Converter - Switching

KeyzerRochaMoura
Designer42201

KeyzerRochaMoura

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8 years 7 months

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVBA130LT3G) and op-amps (NCV20071), as well as the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models. For example, the stress indicator for the power inductor shows that the maximum RMS current level is exceeded under this simulated operating condition (i.e. stress_ratio_current_rms &gt; 1.0).The companion design, "TDFS Loop Stability for Buck DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Buck DC to DC Converter - Switching

GT
Designer59156

GT

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8 years 4 months

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVBA130LT3G) and op-amps (NCV20071), as well as the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models. For example, the stress indicator for the power inductor shows that the maximum RMS current level is exceeded under this simulated operating condition (i.e. stress_ratio_current_rms &gt; 1.0).The companion design, "TDFS Loop Stability for Buck DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Buck DC to DC Converter - Switching

Sarliman
Designer45121

Sarliman

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8 years 6 months

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVBA130LT3G) and op-amps (NCV20071), as well as the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models. For example, the stress indicator for the power inductor shows that the maximum RMS current level is exceeded under this simulated operating condition (i.e. stress_ratio_current_rms &gt; 1.0).The companion design, "TDFS Loop Stability for Buck DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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TDFS Loop Stability for Buck DC to DC Converter - Switching

DGB
Designer12

DGB

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11 years

116

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Description

This design demonstrates the use of the TDFS (Time Domain Frequency Sweep) simulation method, to measure the open-loop frequency response of an operating closed-loop system containing switching elements.The stability of the "Buck DC to DC Converter - Switching" design is assessed. This is a switching circuit, it does not use a state-average model for the modulator, so the standard AC Analysis method cannot be used. Rather, the frequency response is generated from time-domain simulation results. The TDFS approach can also be used for systems that contain sampling or digital control aspects.This particular example is directly comparable to the design titled "TDFS Loop Stability for Buck DC to DC Converter - State Average". In that design, both the TDFS and AC Analysis methods are used to measure the open loop transfer function of an equivalent non-switching circuit.Note that the approach used to characterize the loop stability, by injecting a small sinusoidal stimulus signal in series with the loop and then measuring the complex ratio of the ground referenced return signal to the injected signal, is described in:D. Venable, “Testing Power Sources for Stability”, Venable technical paper #1, Venable Industries

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