Buck Converter | PartQuest™ Explore

Application Area

Mike Donnelly
Designer19

Mike Donnelly

Member for

11 years

1,697

designs

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Member of the PartQuest Explore Development Team. Focused on modeling and simulation of analog, mixed-signal and multi-discipline systems covering a broad range of applications, including power electronics, controls and mechatronic systems.

Description

This design is a "hybrid" circuit implementation of the Buck DC to DC converter, that uses the "state-average" buck model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator” but also the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators used in the full detail implementation shown in the example "Buck DC to DC Converter - Switching". Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the op-amps (NCV20071) and the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.The simulation of this hybrid circuit runs quickly, like the original state-average model, but it give more detailed information about component sizing and performance requirements.

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Buck DC to DC Converter - Switching

Gobiwan
Designer25691

Gobiwan

Member for

8 years 9 months

1

designs

1

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVBA130LT3G) and op-amps (NCV20071), as well as the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models. For example, the stress indicator for the power inductor shows that the maximum RMS current level is exceeded under this simulated operating condition (i.e. stress_ratio_current_rms &gt; 1.0).The companion design, "TDFS Loop Stability for Buck DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Buck DC to DC Converter - Switching

DavidNicholls
Designer21436

DavidNicholls

Member for

8 years 10 months

2

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVBA130LT3G) and op-amps (NCV20071), as well as the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models. For example, the stress indicator for the power inductor shows that the maximum RMS current level is exceeded under this simulated operating condition (i.e. stress_ratio_current_rms &gt; 1.0).The companion design, "TDFS Loop Stability for Buck DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Buck DC to DC Converter - Switching

DmitriyNazarov
Designer8781

DmitriyNazarov

Member for

9 years

3

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVBA130LT3G) and op-amps (NCV20071), as well as the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models. For example, the stress indicator for the power inductor shows that the maximum RMS current level is exceeded under this simulated operating condition (i.e. stress_ratio_current_rms &gt; 1.0).The companion design, "TDFS Loop Stability for Buck DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Buck DC to DC Converter - Switching

WilliamSo
Designer6941

WilliamSo

Member for

9 years

5

designs

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVBA130LT3G) and op-amps (NCV20071), as well as the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models. For example, the stress indicator for the power inductor shows that the maximum RMS current level is exceeded under this simulated operating condition (i.e. stress_ratio_current_rms &gt; 1.0).The companion design, "TDFS Loop Stability for Buck DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

About text formats

Buck DC to DC Converter - Switching

VitalyLugovskiy
Designer6531

VitalyLugovskiy

Member for

9 years

2

designs

1

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVBA130LT3G) and op-amps (NCV20071), as well as the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models. For example, the stress indicator for the power inductor shows that the maximum RMS current level is exceeded under this simulated operating condition (i.e. stress_ratio_current_rms &gt; 1.0).The companion design, "TDFS Loop Stability for Buck DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

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Bi_Quad

UdaiMhd
Designer12566

UdaiMhd

Member for

8 years 11 months

3

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1

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Bi_Quad ( integrator + lead-lag compensator)

UdaiMhd
Designer12566

UdaiMhd

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8 years 11 months

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Buck DC to DC Converter - Switching

CarlRutschow
Designer15011

CarlRutschow

Member for

8 years 11 months

3

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1

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Description

This design is a detailed circuit implementation of the more abstract "state-average" buck converter model shown in the companion design example: “Buck DC to DC Converter vs. Linear Regulator”. This example includes the low-pass voltage sense circuit, an op-amp implementation of the difference amplifier and the lead-lag compensators, as well as PWM switching control of a power MOSFET. Simulation results for the line and load transients, ripple rejection and the power consumption are very similar to the results from the abstract model.This design uses a number of "datasheet characterized" components, including the power MOSFET (MCH6337), freewheel diode (NRVBA130LT3G) and op-amps (NCV20071), as well as the passive inductor (MSS1583-105KE_) and capacitor (PEG127KA3110Q) of the power stage . The parameter values of these devices were entered directly from the datasheet for the corresponding part, including the "Maximum Ratings" information.While the simulation time for this switching circuit is significantly longer than for the abstract model, more detailed information about the circuit’s signals and components is available. This includes the component stress levels, which are monitored within all the "datasheet" models. For example, the stress indicator for the power inductor shows that the maximum RMS current level is exceeded under this simulated operating condition (i.e. stress_ratio_current_rms &gt; 1.0).The companion design, "TDFS Loop Stability for Buck DC to DC Converter - Switching", demonstrates a method to directly assess the open-loop frequency response, and hence the stability margin, of this converter. The TDFS (Time Domain Frequency Sweep) method circumvents the need for state-average models of the switching elements.

About text formats

Buck_converte 2 12/16/2015

AlexDean
Designer14971

AlexDean

Member for

8 years 11 months

1

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Mike DonnellyDesigner19

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GobiwanDesigner25691

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DavidNichollsDesigner21436

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DmitriyNazarovDesigner8781

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WilliamSoDesigner6941

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VitalyLugovskiyDesigner6531

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UdaiMhdDesigner12566

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UdaiMhdDesigner12566

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CarlRutschowDesigner15011

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AlexDeanDesigner14971

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Mike Donnelly
Designer19

Gobiwan
Designer25691

DavidNicholls
Designer21436

DmitriyNazarov
Designer8781

WilliamSo
Designer6941

VitalyLugovskiy
Designer6531

UdaiMhd
Designer12566

UdaiMhd
Designer12566

CarlRutschow
Designer15011

AlexDean
Designer14971